1. Field of the Invention
The present invention relates to a memory device redundant repair analysis method, recording medium and apparatus, and more particularly, to a memory device redundant repair analysis method, recording medium and apparatus that allow a repair analysis of a device including a plurality of memory units (different kinds of memory units) with a plurality of repair analysis rules.
2. Description of Related Art
In recent years, there are a variety of types of semiconductor memory devices (hereinafter simply referred to as xe2x80x9cmemory devicesxe2x80x9d) and there are also a variety of types of their redundant repair analysis methods in the like manner. Among memory devices, a device including different kinds of memory units is under development and thus redundant repair analysis methods are becoming more and more complicated.
In general, memory devices repair defective chips by replacing defects by spare cells (redundant memory cells), which are owned by these chips beforehand. That is, memory devices own spare cells to repair defective memory cells beforehand and carry out redundant repair processing by replacing blocks including defective memory cells by the spare cells and using these cells and thereby converting these defective memory cells to completely good memory IC products as far as those defects are minor defects. In the redundant repair analysis processing, a redundant repair analysis apparatus determines whether a repair is possible or not based on defect information obtained by testing the memory devices first. In the case where it is determined that a repair is possible, it is necessary to specify fuse coordinates to blow a wire called a xe2x80x9cfusexe2x80x9d corresponding to the address of the defective memory cell (hereinafter referred to as xe2x80x9cdefect addressxe2x80x9d) through a laser trimming (LT) apparatus that heats up and fuses the wire using laser beams. For this purpose, the information such as the defect address of the defective memory cell to be repaird and spare cell used is converted to data called a xe2x80x9crepair codexe2x80x9d chip by chip.
The aforementioned redundant repair analysis method is carried out based on a redundant repair analysis rule specific to a memory device. However, since the conventional redundant repair analysis method can handle only one kind of redundant repair analysis rules in a test program to test memory devices, the conventional redundant repair analysis method is unable to handle repair codes when analyzed using two or more kinds of redundant repair analysis rules as a single-chip code. Thus, the conventional redundant repair analysis method has a problem of being unable to handle a redundant repair analysis for a device including a plurality of memory units and including two or more types of redundant repair analysis rules.
The present invention has been achieved to solve the above-described problem and it is an object of the present invention to provide a memory device redundant repair analysis method, recording medium and apparatus allowing a redundant repair analysis method for a memory device with a plurality of redundant repair analysis rules, particularly for a device including different kinds of memory units.
According to a first aspect of the present invention, there is provided a memory device redundant repair analysis method that performs a redundant repair analysis on a plurality of memory devices each provided with a redundant repair analysis rule to repair defective memory, comprising the steps of: a rule application step of applying a redundant analysis rule to each of a plurality of memory devices; and a compiling step of compiling results of applying the redundant analysis rule individually by the rule application step into one result.
According to a second aspect of the present invention, there is provided a recording medium that records a computer-readable program that executes the memory device redundant repair analysis method according to the present inventions.
According to a third aspect of the present invention, there is provided a memory device redundant repair analysis apparatus that performs a redundant repair analysis on a plurality of memory devices each provided with a redundant repair analysis rule to repair defective memory, comprising: rule application means for applying a redundant analysis rule to each of a plurality of memory devices; and compiling means for compiling results of the redundant analysis rule individually applied by the rule application step into one result.
The above and other objects, effects, features and advantages of the present invention will become more apparent from the following description of the embodiments thereof taken in conjunction with the accompanying drawings.